module time_count (
    input clk,
    input rst_n,
    output reg add_flag
);

parameter MAX_NUM = 2500_0000;
reg [24:0] cnt;

always @(posedge clk or negedge rst_n) begin
    if(!rst_n)begin
        cnt <= 1'b0;
        add_flag <= 1'b0;
    end
    else begin
        if(cnt < MAX_NUM - 1'b1) begin
            cnt <= cnt + 1'b1;
            add_flag <= 1'b0;
        end
        else begin
            cnt <= 1'b0;
            add_flag <= 1'b1;
        end
    end
end
    
endmodule